Schematics
JNW_GREX_SKY130A
JNW_GREX
The temperature sensor consists of a block that converts a temperature into a current (TI) and a current into a digital pulse (ITD)
I use inverters on RESET_1V8 and PWRUP_1V8 to re-buffer those signals to local supply, just in case the driving node is far away.
The output is buffered with slightly larger inverter (DO_1V8). The pulse is generated while RESET_1V8 and DO_1V8 is low.
JNWGREX_TI
A cascoded current mirror with a resistor to VDD_1V8.
The voltage across the resistor will be
\[V_{DD} - V_{BN1} \approx 0.37 V\]The resistor is approximately $ 116\text{ }k \Omega$, so the expected current out from the IPTN node is.
\[\frac{1}{2} \frac{0.35\text{ }V } { 116\text{ } k \Omega } \approx 1.5\text{ } \mu A\]The gate-source voltage of the bottom NMOS is about 0.65 V, however, the top NMOS, due to the bulk effect, as an increased gate-source voltage of about 0.78 V.
The threshold voltage decreases with temperature, so the current in the resistor increases, and thus, the current in to IPTN increases with temperature.
JNWGREX_ITD
The capacitor is pre-charged to VDD, and when both RESET_N_1V8 and PWRUP_B_1V8 are high, then the IPTN current increases the charge across the capacitor by pulling the IPTN node down.
The IPTN voltage will decrease linearly according to
\[I = C \frac{dV}{dt}\]As such, assuming the current in the NMOS matches the resistor at about 0.6 V, then the delay would be about
\[dt = 1.7\text{ }pF \frac{1.8\text{ }V - 0.6\text{ }V}{1.5\text{ }\mu A} \approx 1.4\text{ }us\]